ARM AMBA NIC-301 Especificações Página 76

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Programmers Model
ARM DDI 0503F Copyright © 2012-2013 ARM. All rights reserved. 3-19
ID062813 Non-Confidential
Test chip SCC Register 3
The CFGREG3 Register characteristics are:
Purpose SMC CS6 and CS7 Register that controls the match and mask bits of CS6
and CS7. See Mask operation to define SMC chip select address ranges on
page 3-15. CS6 and CS7 are reserved, and the bits in this register are
reserved.
Usage constraints This register is reserved. Do not read from or write to this register.
Configurations Not applicable.
Attributes See Table 3-6 on page 3-13.
Figure 3-8 shows the bit assignments.
Figure 3-8 Test chip CFGREG3 Register bit assignments
Table 3-10 shows the bit assignments.
Test chip SCC Register 4
The CFGREG4 Register characteristics are:
Purpose Miscellaneous Configuration Register that enables you to read and write
test chip configuration settings.
Usage constraints CFGREG4[5:4] =
00
or
11
are reserved and must not be used. These bits
are valid only if CFGREG4[0] is
b0
.
[23:16] - Reserved. Do not modify.
[15:8] SMC_ADDR_MATCH1_0 SMC CS4 address match of top 8 bits.
[7:0] SMC_ADDR_MASK1_0 SMC CS4 address mask of top 8 bits.
Table 3-9 Test chip CFGREG2 Register bit assignments (continued)
Bits Name Function
SMC_ADDR_MATCH1_3
31 24 23 16 15 8 0
0 00110 1 0010011111100 1111 100000
7
00
SMC_ADDR_MASK1_3
SMC_ADDR_MATCH1_2
SMC_ADDR_MASK1_2
Table 3-10 Test chip CFGREG3 Register bit assignments
Bits Name Function
[31:24] - Reserved. Do not modify
[23:16] - Reserved. Do not modify
[15:8] - Reserved. Do not modify
[7:0] - Reserved. Do not modify
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