ARM AMBA NIC-301 Especificações descarregar pdf (Página 142)

Programmers Model

ID062813 Non-Confidential

Figure 3-59 shows the bit assignments.

Figure 3-59 System counter CNTV_CTL Register bit assignments

Table 3-84 shows the bit assignments.

PID0

The PID0 Register characteristics are:

Purpose System timer peripheral identification register 0 that enables you to read

system timer peripheral identification values.

Usage constraints This register is read-only.

Configurations Not applicable.

Attributes See Table 3-68 on page 3-76.

Figure 3-60 on page 3-86 shows the bit assignments.

31 0

0 00000 0 000000000000 0000 000000 00

Reserved

4321

IMSTAT

ISTAT

IMSK

Table 3-84 System counter CNTV_CTL Register bit assignments

Bits Name Function

[31:4] - Reserved. Do not modify.

[3] IMSTAT Interrupt status after masking:

Interrupt asserted.

Interrupt not asserted.

The default is

[2] ISTAT Interrupt status before masking:

Interrupt asserted.

Interrupt not asserted.

The default is

[1] IMSK Mask interrupt:

Mask interrupt.

Unmask interrupt.

The default is

[1] EN Enable timer:

Timer enabled.

Timer disabled.

Default

1 2 ... 137 138 139 140 141 142 143 144 145 146 147 ... 177 178

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