ARM ARM1176JZF-S Manual do Utilizador descarregar pdf (Página 6)

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Introduction to

Instruction Sets

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ARM Instruction Set

All instructions are 32 bits long / many execute in a single cycle

Instructions are conditionally executed

A load / store architecture

Example data processing instructions

SUB r0,r1,#5

ADD r2,r3,r3,LSL #2

ADDEQ r5,r5,r6

Example branching instruction

B <Label>

Example memory access instructions

LDR r0,[r1]

STRNEB r2,[r3,r4]

STMFD sp!,{r4-r8,lr}

r0 = r1 - 5

r2 = r3 + (r3 * 4)

IF EQ condition true r5 = r5 + r6

Branch forwards or backwards relative to

current PC (+/- 32MB range)

Load word at address r1 into r0

IF NE condition true, store bottom byte

of r2 to address r3+r4

Store registers r4 to r8 and lr on

stack. Then update stack pointer

1 2 3 4 5 6 7 8 9 10 11 ... 18 19

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ARM ARM1176JZF-S Manual do Utilizador Página 6