ARM ARM1176JZF-S Manual do Utilizador descarregar pdf (Página 13)

Confidential

252525

Cycle

Operation

ADD

SUB

ORR

AND

EOR

ORR

Optimal Pipelining

All operations here are on registers (single cycle execution)

In this example it takes 6 clock cycles to execute 6 instructions

Clock cycles per Instruction (CPI) = 1

1 2 3 4 5 6 7 8 9

F D E

F E

F D E

F - Fetch D - Decode E - Execute

262626

Breaking the pipeline

Note that the core is executing in ARM state

Cycle

Address Operation

0x8000 BL 0x8FEC

0x8004 SUB

0x8FF0 ORR

0x8FEC AND

0x8FF4 EOR

0x8008 ORR

1 2 3 4 5 6 7 8 9

F D E

F D

F E

F D E

F - Fetch D - Decode E – Execute L – Linkret A - Adjust

Branch Pipeline Example

1 2 ... 8 9 10 11 12 13 14 15 16 17 18 19

Sem comentários

ARM ARM1176JZF-S Manual do Utilizador Página 13