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Data Sizes and Instruction Sets
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When used in relation to the ARM:
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Halfword means 16 bits (two bytes)
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Word means 32 bits (four bytes)
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Doubleword means 64 bits (eight bytes)
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Most ARMs implement two instruction sets
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32-bit ARM Instruction Set
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16-bit Thumb Instruction Set
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Latest ARM cores introduce a new instruction set Thumb-2
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Provides a mixture of 32-bit and 16-bit instructions
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Maintains code density with increased flexibility
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Jazelle-DBX cores can also execute Java bytecode
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The ARM has seven basic operating modes:
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Each mode has access to own stack and a different subset of registers
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Some operations can only be carried out in a privileged mode
Processor Modes
Entered when a high priority (fast) interrupt is
raised
FIQ
Entered when a low priority (normal) interrupt
is raised
IRQ
Used to handle memory access violationsAbort
Used to handle undefined instructionsUndef
Privileged mode using the same registers as
User mode
System
Unprivileged
mode
Mode under which most Applications / OS
tasks run
User
Privileged
modes
Entered on reset and when a Software Interrupt
instruction (SWI) is executed
Supervisor
(SVC)
DescriptionMode
Exception modes
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