ARM Cortex-M3 Manual do Utilizador descarregar pdf (Página 24)



Single stepping



ITM (Instrumentation Trace Module)



Support for instrumented code



Like “

printf

” debugging, but single cycle writes to ITM module can be exported via serial

interface



Optional ETM (Embedded Trace Module

) which provides instruction trace



Access to all memory and registers via Debug Access Port (DAP)



Profiling

Support



Helps you

optimize your

code



hardware triggered PC

sampler is provided by the Cortex

M3 core



Flash patch / Breakpoints



6 instruction comparators, ARMv5T BKPT instruction is supported



2 literal comparators



Allows flash code to be remapped into SRAM or system address space



Data

Watchpoint

and Trace (DWT)

that implements 4 h/w

watchpoints

Cortex

M3 Debug

1 2 ... 19 20 21 22 23 24 25 26 27 28 29 ... 40 41

ARM Cortex 1
Introduction 1
M3 Processor 4
M3 Microcontroller 5
ARM and Thumb Performance 7
The Thumb 8
2 instruction set 8
M3 Register Set 10
Program Status Register 11
An Example AMBA System 12
Memory Map 13
Processor Privilege 16
Memory Protection Unit (MPU) 17
0x02000000 18
Word alias 19
Physical bit 19
Conditional Execution 20
Interrupt Handling 21
Exception Handling 22
Power Management 23
M3 Debug 24
M3 Datapath 26
M3 Pipeline 27
Optimal Pipelining 28
Branch Pipeline Example 29
LDR Pipeline Example 30
STR Pipeline Example 31
M3 Development Platforms 35
Rapid Prototyping 36
Documentation 39
University Resources 40

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