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Embedded Trace Macrocell

ID072410 Non-Confidential

10.2.9 Operation

ETM-M3 implements version 3.5 of the ARM Embedded Trace Macrocell protocol.

Table 10-5 Trigger output connections

Trigger bit

Destination

signal

Destination

device

Comments

[7] User defined - -

[6] User defined - -

[5] ETMEXTIN[1] ETM Compulsory if ETM is present.

[4] ETMEXTIN[0] ETM Compulsory if ETM is present.

[3] INTISR[y] NVIC Recommended if an ETB is present. If multiple cores share a

single ETB, you must only connect to the CTI of one of the cores.

[2] INTISR[x] NVIC Compulsory. Any interrupt can be used.

[1] User defined - -

[0] EDBGRQ Core Compulsory.

1 2 ... 89 90 91 92 93 94 95 96 97 98 99 ... 136 137

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ARM Cortex-M3 Guia do Utilizador Página 94