ARM IM-AD1 Guia do Utilizador descarregar pdf (Página 69)

Reference Design Example

4.9 SSRAM interface

The SSRAM interface provides read and write access to the 1MB ZBT SSRAM on the

logic module. Accesses take two system clock cycles for reads and writes. The interface

supports word, halfword, and byte accesses to the SSRAM.

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ARM IM-AD1 Guia do Utilizador Página 69