ARM ARM7TDMI Manual do Utilizador descarregar pdf (Página 33)

Page 29

Usage and Examples:

The STM instruction permits block moves of registers to memory and enables efficient

stack operations. The registers may be listed in any order, but the registers are always

stored in order with the lowest numbered register going to the lowest memory address.

If Rn is also listed in the register list and register writeback (W bit) is set, the final value

stored for Rn can be unpredictable.

The addressing_mode field determines how

next_address

is calculated (bits P & W),

which control how the address is updated in conjunction with each register store. The

four addressing_mode values are;

 IA - increment address by 4 after each load (post-increment)

 IB - increment address by 4 before each load (pre-increment)

 DA - decrement address by 4 after each load (post-decrement)

 DB - decrement address by 4 before each load (pre-decrement)

The “!” following Rn controls the value of the writeback bit (bit W), and signifies that Rn

should be updated with the ending address at the end of the instruction. If the “!” is

not present (W=0), the value of Rn will be unchanged at the end of the instruction.

STMIA R7, {R0, R2-R4} ;memory[R7]  R0

;memory[R7+4]  R2

;memory[R7+8]  R3

;memory[R7+12]  R4

;R7 is unchanged

STMDB R7!, {R0, R2-R4} ;memory[R7-16]  R0

;memory[R7-12]  R2

;memory[R7-8]  R3

;memory[R7-4]  R4

;R7  R7 - 16

For use in conjunction with stack addressing, four alternative names can be used for

the addressing modes. See the LDM instruction for a detailed discussion and example of

usage.

1 2 ... 28 29 30 31 32 33 34 35 36 37 38 ... 42 43

Sem comentários

ARM ARM7TDMI Manual do Utilizador Página 33